1. Field of the Invention
The present invention relates to a semiconductor integrated circuit, and more particularly, to a semiconductor integrated circuit comprising functional modes.
2. Description of the Related Art
Semiconductor integrated circuits employ functional modes in which device characteristic analysis and reliability verification are performed. Further, by using functional modes a test time and/or a burn-in test time can be reduced in a packaging process. The analysis, verification, and test functions are performed through joint test action group (JTAG) pins available to designers, or function command cells. However, a designer cannot set a desired function in a package without a pin and control code being made available during the packaging process.